Circuit for eliminating current flow through the deflection coils of a crt when the beam is not being moved through a raster pattern

ABSTRACT

This invention relates to a circuit which substantially eliminates current flow through the deflection coils of a cathode ray tube (CRT) when the CRT beam is not being moved through a raster pattern. The circuit includes a time out circuit which generates a predetermined signal at all times except for a predetermined time period after it receives an input. When the beam is being moved through a raster pattern, successive pulses are applied as inputs to the time out circuit, the time period between the pulses being less than the predetermiend time period. There is also a control circuit provided for each deflection coil which control circuit includes a means responsive to a signal from the time out means for causing the control circuit to apply zero current to the corresponding deflection coil.

Elite ttes atent [1 1 Demichiel et a1.

[ CIRCUIT FOR ELIMINATING CURRENT FLOW THROUGH THE DEFLECTION COILS OF ACRT WHEN THE BEAM 18 NOT BEING MOVED THROUGH A RASTER PATTERN Inventors:John Demichiel; Arthur Langer,

both of Stamford, Conn.

Assignee: Bunker Ramo Corporation, Oak

Brook, 111.

Filed: June 28, 1973 Appl. No.: 374,777

[4 Dec. 16, 1974 3,810,024 5/1974 Meacham 315/20 Primary Examiner-T. H.Tubbesing Assistant Examiner-G. E. Montone Attorney, Agent, or Firm-F.M. Arbuckle; Norton Lesser [5 7] ABSTRACT This invention relates to acircuit which substantially eliminates current flow through thedeflection coils of a cathode ray tube (CRT) when the CRT beam is notbeing moved through a raster pattern. The circuit includes a time outcircuit which generates a predetermined signal at all times except for apredetermined time period after it receives an input. When the beam isbeing moved through a raster pattern, successive pulses are applied asinputs to the time out circuit, the time period between the pulses beinless than the predetermined time period. There is a so a control circuitprovided'for each deflection coil which control circuit includes a meansresponsive to a signal from the time out means for causing the controlcircuit to apply zero current to the corresponding deflection coil.

13 Claims, 3 Drawing Figures SHEET 1 OF 2 PATENTEB DEC I 0 I974PATENTEL) JED! 0 I974 sum 2 (IF 2 CIRCUIT FOR ELIMINATING CENT FLOWTHROUGH THE DEFLECTION COILS OF A CRT WHEN THE BEAM IS NOT BEING MOVEDTHROUGH RASTER PATTERN This invention relates to a circuit for use in acathode ray tube (CRT) display device which circuit substantiallyeliminates current flow through the deflection coils of the CRT when theCRT beam is not being moved through a raster pattern.

BACKGROUND OF THE INVENTION In order to maintain the display ofinformation on a CRT, it is necessary that the CRT display beperiodically refreshed. In other words, once every n milliseconds (wheren is a function of the refresh rate of the CRT) the CRT beam traces apredetermined pattern across the face of the CRT screen with the beambeing selectively intensified under control of information inputs torewrite the displayed information on the screen. Typically, the refreshrate is roughly 60Hz (i.e., 60 times a second) resulting in a frameperiod of roughly 16.67 ms. However, particularly for small tubes, thetime required to write a frame of data is substantially less than theframe period. Thus, with a five inch display tube, only a 6.25 ms timeslot might be required to refresh the display leaving roughly a 10.42 mstime period when no data or raster are present.

In existing systems, the deflection coils are either left energized toposition the CRT beam at the end-ofraster position of the beam duringthis no-data period,

or the deflection coils are energized to return the beam to itsstart-offrame position. In either event, the beam is not intensifiedduring this period to prevent damage to the tube phosphor. However, thedeflection coils are energized during this period, causing the coils todraw unneeded power. More important, the current flowing through thecoils heats both the coils andthe other components connected in thedeflection coil circuits, including components of the output stages.This heat reduces the life of the coils and of the other components andthus increases maintenance costs and reduces reliability for the displaydevice. In order to at least partially compensate for the adverseeffects of this additional heat, additional costs must be incurred inproviding heat dissipating members.

In recognition of the above, some efforts have heretofore been made toreduce or eliminate the current flow through the deflection coils duringthe no-data periods of each frame. However, these efforts have eitherbeen both complicated and expensive, or have been only partiallyeffective, reducing rather than eliminating current through thedeflection coils during the nodata periods. A need therefore exists fora simple, inexpensive technique for completely eliminating current flowthrough the deflection coils of a display device CRT during periods ofeach frame when there is n data or raster.

SUMMARY OF THE INVENTION In accordance with the above this inventionprovides a circuit for use in a cathode ray tube (CRT) display device ofthe type having a horizontal deflection coil for controlling thehorizontal position of the CRT beam and a vertical deflection coil forcontrolling the vertical position of the CRT beam, which circuit isoperative to substantially eliminate current flow through both of thedeflection coils when the beam is not being moved by the coils through araster pattern. The circuit includes a time-out means for generating apredetermined signal when the beam is not being moved through the rasterpattern. For a preferred embodiment, the time-out means includes atime-out circuit which generates an output at all times except for apredetermined time period after it receives an input. The circuit alsoincludes a means operative when the beam is being moved through a rasterpattern for applying successive pulses as inputs to the time-outcircuit, the time period between the pulses being less than thepredetermined time period. Horizontal and vertical control means areprovided for respectively controlling the current flowing through thehorizontal and vertical deflection coils. A means is included as part ofeach of the control means which is responsive to a signal from thetime-out means for causing each of the control means to applysubstantially zero current to the corresponding deflection coil. For apreferred embodiment of the invention, each of the control meansincludes a deflection amplifier, a capacitor, the capacitor beingconnected such that the charge thereacross serves as the controlpotential applied to the deflection amplifier, a resistor connected topermit the capacitor to discharge to, and be maintained at, apredetermined potential level which, when applied to the correspondingdeflection amplifier, results in no current being applied to thecorresponding deflection coil, and a means for permitting each capacitorto discharge through the corresponding resistor only when there is asignalfrom the time-out means.

The foregoing and other objects, features and advantages of theinvention will be apparent from the followi ng more particulardescription of the invention as shown in the accompanying drawings.

BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is a diagram showing the face of aCRT with an exemplary raster for a preferred embodiment of theinvention.

FIG. 2 is a semi-block schematic diagram of a circuit incorporating theteachings of this invention.

FIG. 3 is a timing diagram illustrating the signals appearing atselected points in the circuit of FIG. 2.

DETAILED DESCRIPTION .for each line of the display with six or sevenvertical strokes being provided for each character to be displayed onthe line. Seven index points on each of five strokes for each characterare selectively intensified to form a desired character, the remainingone or two strokes of each character being for intercharacter spacmg.

Referring now to FIG. 2, a horizontal deflection coil 16 and a verticaldeflection coil 18 are provided which coils are normally mounted on theneck of the CRT. When neither of the coils 16 or 18 has current appliedto it, the CRT beam is positioned at approximately the middle of thescreen (position shown in FIG. 1). A

- negative potential applied to coil 16 moves the beam to the left and apositive potential applied to coil 16 moves the beam to the right, theamperage of the current flowing through the coil in each instancedetermining how far to the left or right the beam is moved. Similarly, anegative potential applied to coil 18 moves the CRT beam up from point20 and a positive potential applied to coil 18 moves the beam down frompoint 20, the quantity of current flowing through coil 18 againdetermining the extent of the movement.

A horizontal scan signal is applied through horizontal scan (I-ISCN)line 22 to a horizontal scan control circuit 24. More specifically, line22 is connected through a resistor 26 to the base of atransistor 28. Theemitter of "the transistor i's connected togrounii wliiTcolleetor of thetransistor is connected through a line 32 and a variable resistor 34 toa source of positive potential. A capacitor 36 is connected between theemitter and collector of transistor 28.

Line 32 is the output from circuit 24 and is connected as one input tohorizontal deflection amplifier 38. Amplifier 38 controls the currentflow to horizontal deflection coil 16 which is connected to the outputof the amplifier. The other side of coil 16 is connected throughresistor 40 to ground and is also connected through a feedback circuit42 as a feedback input to the horizontal deflection amplifier.

Frame return (FR) line 44 and line step line (LNSP) 46 are connected asinputs to vertical control circuit 48. In particular, line 44 isconnected through resistor 50 to the base of transistor 52. The emitterof this transistor is connected directly to ground and a capacitor 56 isconnected between the emitter and collector of the transistor. Thecollector of the transistor is also connected through a line 58 anddiode string 60 to a constant current source 62. LNSP line 46 isconnected through a diode 64 to a point between diode string 60 and theconstant current source.

Line 58, which is the output line from circuit 48, is connected as oneinput to a vertical deflection amplifier 66 which controls the currentflow through vertical deflection coil 18. An isolation coil 68 isconnected between amplifier 66 and coil 18, the other side of coil 18being connected through resistor 70 to ground, and through feedbackcircuit 72 to vertical deflection amplifier 66.

HSCN line 22 is also connected as the input to timeout circuit 74. Inparticular, line 22 is connected through resistor 75 to the base oftransistor 76, the emitter of this transistor being connected to groundand the collector of the transistor being connected through a line 78and a resistor 80 to a source of positive potential. A capacitor 82 isconnected between the emitter and collector of transistor 76. line 78 isconnected through a resistor 84 to the base of a transistor 86. The baseof transistor 86 is also connected through a resistor 88 to a source ofnegative potential, with the emitter of transistor 86 being connectedto'ground and the collector of the transistor being connected through aline 90 and a resistor 92 to a source of positive potential.

Line 90 is also the output line from time-out circuit 74. Line 90 isconnected through a variable resistor 92 and a diode 94 to line 32 ofhorizontal control circuit 24 and is also connected through variableresistor 96 and diode 98 to line 58 of vertical control circuit 48.

OPERATION Referring now to FIG. 3, and in particular to line A of thisfigure, it is seen that the frame period for the il lustrativeembodiment of the invention is 16.67 milliseconds (i.e., a refresh rateof 60 Hz). However, from lines B and C, it can be seen that the refreshof each line requires only 695 microseconds. Therefore, the nine linesof the display are refreshed in roughly 6.25 milliseconds leavingroughly 10.42 milliseconds millisecond when no raster is being traced onscreen 10.

In operation, a frame retrace pulse 100 is first applied to line 44causing transistor 52 to become conductive for 695 microseconds, aperiod suflicient for capacitor 56 to be fully discharged through thetransistor. At the end of pulse 100, short 73 microsecond pulses 102 and104 are applied to HSCN line 22 and LNSP line 46 respectively. Thesignal on line 46 back-biases diode 64, permitting current from constantcurrent source 62 to flow into capacitor 56 through diode string 60.Thus, for the duration of the pulse on line 46, an increment of chargeis applied to capacitor 56 raising the potential level on line 58 to thelevel 106 (FIG. 3E). This positive potential level applied to verticaldeflection amplifier 66 results in a negative output current throughvertical deflection coil 18 which is of such magnitude as to positionthe CRT beam for writing on the first line of the display shown in FIG.1 (i,e., the line for starting point 12).

At the time that the I-ISCN pulse 102 appears on line 22, time-outcircuit 74 is set with transistor 76 cut-off and transistor 86conducting so that the output on line 90 is at substantially groundpotential. The pulse 102 is applied to turn transistor 76 on, permittingthe charge on capacitor 82 to leak off therethrough. The discharge ofcapacitor 82 causes the base of transistor 86 to go negative under theinfluence of the signal from the minus voltage source through resistor88. This cuts off transistor 86, resulting in a positive potential beingapplied to line 90, which back biases both diodes 94 and 98 preventingcurrent from flowing on line 90.

The HSCN pulse 102 is also applied to turn on transistor 28, permittingcapacitor 36 to become discharged. The potential on line 32 whencapacitor 36 is fully discharged is applied to horizontal deflectionamplifier 38, resulting in a negative output current being appliedthrough horizontal deflection coil 16 which is of sufficient magnitudeto move the beam to its leftmost-position (i.e., the position ofstarting point 12) on a line.

When pulses 102 and 104 terminate, capacitor 36 starts to charge throughresistor 34 and capacitor 82 starts the charge through resistor 80. Thecharging of capacitor 36 results in a ramp voltage appearing on line 32(FIG. 3D) which voltage, when applied to horizontal deflection amplifier38, results in suitable current being applied through horizontaldeflection coil 16 to move the CRT beam across a line of the displayfrom starting point 12 to the right-most position inwhich data is tobedisplayed. The charging of capacitor 82 increases the potential online 78 and thus the potential applied to the base of transistor 86.However, the relative values of the voltage sources and of the resistors84 and 88, and the valve of capacitor 82 and thus its charging rate, aresuch that approximately 1,000 microseconds (lms) are required aftercapacitor 82 has been discharged before the charge on the capacitor issufficient to cause the base of transistor 86 to go positive turning thetransistor on. However, after 695 microseconds, signals again appear onlines 22 and 46, the signal on line 22 again discharging capacitor 82before it has had a chance to charge sufficiently to turn transistor 86on. The signal on line 46 causes another increment of charge to beapplied to capacitor 56 stepping the beam down to write on the secondline of the display (FIG. 1) and the signal on line 22 results incapacitor 36 being discharged in the manner previously indicated,causing the CRT beam to again be returned to its left-most writingposition.

When the pulse on line 22 terminates, capacitor 36 again startscharging, causing the CRT beam to scan across the second line of thedisplay. Capacitor 82 also starts charging.

The above-described sequence of operations is repeated for eachsucceeding line of the display, with increments of charge being appliedto capacitor 56 to step the CRT beam down for each succeeding line,capacitor 36 being charged to scan the beam across each line and thendischarged by an HSCN pulse on line 22 to return the beam to itsleft-most writing position, and capacitor 82 being discharged by eachHSCN pulse on line 22 before it is charged sufficiently to turntransistor 86 on, resulting in a continuous positive output on line 90from time-out circuit 74. However, after the ninth HSCN pulse 108 online 22, there are no further pulses on this line for the remainder ofthe frame. Thus, one thousand microseconds after the pulse 108 appearson line 22 (a little over 300 microseconds after writing at point 14 ofthe display) capacitor 82 becomes sufficiently positively charged tocause transistor 86 to become conductive. This results in line 90 goingto essentially ground potential, forward biasing both diodes 94 and 96.Diode 94 being forward biased permits capacitor 36 to partiallydischarge through diode 94, resistor 92, line 90, and transistor 86. Thevalue of resistor 92 is adjusted such that the potential acrosscapacitor 36, and therefore the potential on line 32 is at the properlevel to cause horizontal deflection amplifier 38 to apply zero currentto horizontal deflection coil 16. This potential is roughly equal tohalf the potential required to move the beam from the left-most writingposition on a line to the right-most writing position on a line, thebeam thus being positioned at roughly the midpoint of a line. Thepotential on line 32 (and therefore the charge across capacitor 36) ismaintained by current flow from the source of positive potential throughresistor 34, diode 94, resistor 92, etc.

Similarly, capacitor 56 discharges through diode 98, resistor 96, line90, and transistor 86. The value of resistor 96 is adjusted such thatthe potential across capacitor 56, and thus on line 58 is at the properlevel to cause vertical deflection amplifier 66 to apply zero current tovertical deflection coil 18. This potential is roughly half thepotential required to move the beam from top to bottom of screen 10, theresidual charge remaining on capacitor 56 thus causing the potential online 58 to be such as to cause deflection amplifier 66 to pass zerocurrent through coil 18 to position the beam at roughly the verticalposition of point 20. This potential on line 58 (and thus acrosscapacitor 56) is maintained by current flow from constant current source62, through diode string 60, diode 98, resistor 96, etc.

Thus, so long as line is at ground potential (i.e., so long as time'outcircuit 74 is in a time-out condi tion), there is zero current flowingthrough both horizontal deflection coil 16 and vertical deflection coil18. There is also zero current flowing in isolation coil 68 and in theother output elements of the circuit (some of which are not shown). Thiszero-current condition in the deflection coils exists for roughly 10 msof each 16.67 ms frame period, or, in other words, for roughly 60percent of each frame period. Circuit and component heating and elementwear are thus significantly reduced resulting in significantly improvedreliability and significantly lower maintenance.

While the invention has been described above with respect to amulti-line stroke raster scan, it is apparent that the invention isequally applicable with other raster scanning techniques. All that isrequired is that there be a sync pulse signal which appears only whenraster is being generated, the absence of this signal then being used topermit a time-out circuit to time-out, and the outputs from the time-outcircuit being utilized to control the current applied to the deflectionamplifiers such that zero current is applied to the amplifiers. Thus,while the invention has been particularly shown and described above withreference to a preferred embodiment, it will be understood by thoseskilled in the art that the foregoing and other changes in form anddetail may be made therein without departing from the spirit and scopeof the invention.

What is claimed is:

1. In a cathode ray tube (CRT) display device of the type having ahorizontal deflection coil for controlling the horizontal position ofthe CRT beam, a vertical deflection coil for controlling the verticalposition of the CRT beam, and horizontal and vertical control means forrespectively controlling the current flowing through said horizontal andvertical deflection coils, said coils being operative under control ofsaid control means for moving the beam through a selected rasterpattern, a circuit for substantially eliminating current flow throughboth of said deflection, coils when the beam is not being moved throughsaid raster pattern, comprismg:

a time-out circuit which generates a selected output at all time exceptfor a predetermined time period after it receives an input;

means operative when the beam is being moved through a raster patternfor applying successive pulses as inputs to said time-out circuit, thetime period between said pulses being less than said predetermined timeperiod; and

means included as part of each of said control means and responsive tothe selected output from said time-out circuit for causing each of thecontrol means to apply substantially zero current to the correspondingdeflection coil. 7

2. A circuit as claimed in claim 1 wherein said horizontal control meansinclude a horizontal deflection amplifier and a horizontal scan controlcircuit connected to selectively apply voltage variable signals to thedeflection amplifier to move the beam horizontally across the CRT; and

wherein said successive pulses are horizontal scan control pulses whichare also applied to reset said horizontal scan control circuit.

3. A circuit as claimed in claim 2 wherein said horizontal scan controlcircuit includes a capacitor which, when charged to a predeterminedpotential level, causes an input to be applied to said horizontaldeflection amplifier which results in no current being applied tothe-deflection coil, a current of a first polarity being applied to thedeflection coil to move the beam in a first direction when the capacitorcharged to a level less than said predetermined potential level and acurrent of a second polarity being applied to the deflection coil tomove the beam in the opposite direction when the capacitor is charged toa level greater than said predetermined level; and

wherein said horizontal control means includes a resistor connected topermit said capacitor to discharge therethrough to said predeterminedpotential level when said time-out circuit generates said selectedoutput.

4. A circuit as claimed in claim 3 wherein said horizontal control meansincludes a diode connected to permit said capacitor to discharge throughsaid resistor only when there is said selected output from said timeoutcircuit.

5. A circuit as claimed in claim 1 wherein said horizontal control meansincludes a horizontal deflection amplifier, a capacitor, the capacitorbeing connected such that the charge thereacross serves as the controlpotential applied to the deflection amplifier, and a resistor connectedto permit said capacitor to discharge therethrough to a predeterminedpotential level which when applied to the horizontal deflectionamplifier, results in no current being applied to the horizontaldeflection coil, and means for permitting said capacitor to dischargethrough said resistor only when there is said selected output from saidtime-out circuit.

6. A circuit as claimed in claim 5 wherein said means for permittingsaid capacitor to discharge includes a diode connected between saidcapacitor and said resistor.

7. A circuit as claimed in claim 1 wherein said vertical control meansincludes a vertical deflection amplifier, a capacitor, the capacitorbeing connected such that the charge thereacross serves as the controlpotential applied to the deflection amplifier, a resistor connected topermit said capacitor to discharge therethrough to a predeterminedpotential level which, when applied to the vertical deflectionamplifier, results in no current being applied to the verticaldeflection coil, and means for permitting said capacitor to dischargethrough said resistor only when there is said selected output from saidtime-out circuit.

8. A circuit as claimed in claim 7 wherein said means for permittingsaid capacitor to discharge includes a diode connected between saidcapacitor and said resistor.

9. A device as claimed in claim 1 wherein said horizontal and saidvertical control means each includes a deflection amplifier, acapacitor, the capacitor being connected such that the chargethereacross serves as the control potential applied to the correspondingdeflection amplifier, a resistor connected to permit the correspondingcapacitor to discharge therethrough to a predetermined potential levelwhich, when applied to the corresponding deflection amplifier, resultsin no current being applied to the corresponding deflection coil, andmeans for permitting each of said capacitors to discharge through thecorresponding resistor only when there is said selected output from saidtime-out circuit.

10. A device as claimed in claim 9 wherein each of said means forpermitting said capacitor to discharge includes a diode connectedbetween the corresponding capacitor and the corresponding resistor.

11. In a cathode ray tube (CRT) display device of the type having ahorizontal deflection coil for controlling the horizontal position ofthe CRT beam, and a vertical deflection coil for controlling thevertical position of the CRT beam, said coils being operative whensuitably energized for moving the beam through a selected rasterpattern, a circuit for substantially eliminating current flow throughboth of said deflection coils when the beam is not being moved throughsaid raster pattern, comprising:

time-out means operative for generating a selected output when the beamis not being moved through said raster pattern; and

horizontal and vertical control means for respectively controlling thecurrent flowing through said horizontal and vertical deflection coils,said horizontal and vertical control means each including a deflectionamplifier, a capacitor, the capacitor being connected such that thecharge thereacross serves as the control potential applied to thecorresponding deflection amplifier, a resistor connected to permit saidcapacitor to discharge therethrough to a predetermined potential levelwhich, when applied to the corresponding deflection amplifier, resultsin no current being applied to the corresponding deflection coil, andmeans for permitting each of said capacitors to discharge through thecorresponding resistor only when there is said selected output from saidtime-out means.

12. A device as claimed in claim 11 wherein each of said means forpermitting said capacitor to discharge includes a diode connectedbetween the capacitor and the corresponding resistor.

13. A device as claimed in claim 11 wherein said time-out means includesa time-out circuit which generates the selected output at all timesexcept for a predetermined time period after it receives an input;

and including means operative when the beam is being moved through araster pattern for applying successive pulses as inputs to said time-outcircuit, the time period between said pulse being less than saidpredetermined time period.

UNITED STATES PATEN'I OFFICE CER'lIFICA'.t?E OF CORRECTION PATENT NO.3,854,074

DATED December 10, 1974,

INVENTOMS) I John Demlchlel and Arthur Langer It is certified that errorappears in the above-identified patent and that said Letters Patent arehereby corrected as shown below;

Column 3, line 56, change "line" to Line-.

Claim 3, column 7, line 8, after "capacitor" insert is.

Signed and Sealed this third Day of February 1976 [SEAL] Attest:

RUTH C. MASON C. MARSHALL DANN Arresting Officer Commissioner oj'Parentsand Trademarks UNITED STNIES PA'IEN'I OFFICE CERTIFICATE OF CORRECTIONPATENT NO. 3,854,074

DATED December 10, 1974 INVENTOMS) I John Demichiel and Arthur Langer Itis certitied that error appears in the above-identified patent and thatsaid Letters Patent are hereby corrected as shown below.

Column 3, line 56, change "line" to -Line.

Claim 3, column 7, line 8, after capacitor" insert -is.

Signed and Emalcd this third D ay 0f February 1976 [SEAL] Attesr:

RUTH C. MASON C. MARSHALL DANN Arresting Officer Commissioner ofParentsand Trademarks

1. In a cathode ray tube (CRT) display device of the type having ahorizontal deflection coil for controlling the horizontal position ofthe CRT beam, a vertical deflection coil for controlling the verticalposition of the CRT beam, and horizontal and vertical control means forrespectively controlling the current flowing through said horizontal andvertical deflection coils, said coils being operative under control ofsaid control means for moving the beam through a selected rasterpattern, a circuit for substantially eliminating current flow throughboth of said deflection, coils when the beam is not being moved throughsaid raster pattern, comprising: a time-out circuit which generates aselected output at all time except for a predetermined time period afterit receives an input; means operative when the beam is being movedthrough a raster pattern for applying successive pulses as inputs tosaid timeout circuit, the time period between said pulses being lessthan said predetermined time period; and means included as part of eachof said control means and responsive to the selected output from saidtime-out circuit for causing each of the control means to applysubstantially zero current to the corresponding deflection coil.
 2. Acircuit as claimed in claim 1 wherein said horizontal control meansinclude a horizontal deflection amplifier and a horizontal scan controlcircuit connected to selectively apply voltage variable signals to thedeflection amplifier to move the beam horizontally across the CRT; andwherein said successive pulses are horizontal scan control pulses whichare also applied to reset said horizontal scan control circuit.
 3. Acircuit as claimed in claim 2 wherein said horizontal scan controlcircuit includes a capacitor which, when charged to a predeterminedpotential level, causes an input to be applied to said horizontaldeflection amplifier which results in no current being applied to thedeflection coil, a current of a first polarity being applied to thedeflection coil to move the beam in a first direction when the capacitorcharged to a level less than said predetermined potential level and acurrent of a second polarity being applied to the deflection coil tomove the beam in the opposite direction when the capacitor is charged toa level greater than said predetermined level; and wherein saidhorizontal control means includes a resistor connected to permit saidcapacitor to discharge therethrough to said predetermined potentiallevel when said time-out circuit generates said selected output.
 4. Acircuit as claimed in claim 3 wherein said horizontal control meansincludes a diode connected to permit said capacitor to discharge throughsaid resistor only when there is said selected output from said time-outcircuit.
 5. A circuit as claimed in claim 1 wherein said horizontalcontrol means includes a horizontal deflection amplifier, a capacitor,the capacitor being connected such that the charge thereacross serves asthe control potential applied to the deflection amplifier, and aresistor connected to permit said capacitor to discharge therethrough toa predetermined potential level which when applied to the horizontaldeflection amplifier, results in no current being applied to thehorizontal deflection coil, and means for permitting said capacitor todischarge through said resistor only when there is said selected outputfrom said time-out circuit.
 6. A circuit as claimed in claim 5 whereinsaid means for permitting said capacitor to discharge includes a diodeconnected between said capacitor and said resistor.
 7. A circuit asclaimed in claim 1 wherEin said vertical control means includes avertical deflection amplifier, a capacitor, the capacitor beingconnected such that the charge thereacross serves as the controlpotential applied to the deflection amplifier, a resistor connected topermit said capacitor to discharge therethrough to a predeterminedpotential level which, when applied to the vertical deflectionamplifier, results in no current being applied to the verticaldeflection coil, and means for permitting said capacitor to dischargethrough said resistor only when there is said selected output from saidtime-out circuit.
 8. A circuit as claimed in claim 7 wherein said meansfor permitting said capacitor to discharge includes a diode connectedbetween said capacitor and said resistor.
 9. A device as claimed inclaim 1 wherein said horizontal and said vertical control means eachincludes a deflection amplifier, a capacitor, the capacitor beingconnected such that the charge thereacross serves as the controlpotential applied to the corresponding deflection amplifier, a resistorconnected to permit the corresponding capacitor to dischargetherethrough to a predetermined potential level which, when applied tothe corresponding deflection amplifier, results in no current beingapplied to the corresponding deflection coil, and means for permittingeach of said capacitors to discharge through the corresponding resistoronly when there is said selected output from said time-out circuit. 10.A device as claimed in claim 9 wherein each of said means for permittingsaid capacitor to discharge includes a diode connected between thecorresponding capacitor and the corresponding resistor.
 11. In a cathoderay tube (CRT) display device of the type having a horizontal deflectioncoil for controlling the horizontal position of the CRT beam, and avertical deflection coil for controlling the vertical position of theCRT beam, said coils being operative when suitably energized for movingthe beam through a selected raster pattern, a circuit for substantiallyeliminating current flow through both of said deflection coils when thebeam is not being moved through said raster pattern, comprising:time-out means operative for generating a selected output when the beamis not being moved through said raster pattern; and horizontal andvertical control means for respectively controlling the current flowingthrough said horizontal and vertical deflection coils, said horizontaland vertical control means each including a deflection amplifier, acapacitor, the capacitor being connected such that the chargethereacross serves as the control potential applied to the correspondingdeflection amplifier, a resistor connected to permit said capacitor todischarge therethrough to a predetermined potential level which, whenapplied to the corresponding deflection amplifier, results in no currentbeing applied to the corresponding deflection coil, and means forpermitting each of said capacitors to discharge through thecorresponding resistor only when there is said selected output from saidtime-out means.
 12. A device as claimed in claim 11 wherein each of saidmeans for permitting said capacitor to discharge includes a diodeconnected between the capacitor and the corresponding resistor.
 13. Adevice as claimed in claim 11 wherein said time-out means includes atime-out circuit which generates the selected output at all times exceptfor a predetermined time period after it receives an input; andincluding means operative when the beam is being moved through a rasterpattern for applying successive pulses as inputs to said time-outcircuit, the time period between said pulse being less than saidpredetermined time period.